Mode (electronics)

In electronics, the mode of an electrical device refers to a range of operation set by its bias condition or, when no signals are present, by its operating point or Q-point (quiescent point). In analog circuits the so-called active mode of the device is chosen by the circuit designer to allow adequate signal amplitude and adequate voltage or current gain, along with acceptable signal distortion. In digital circuits, a device toggles between the off-mode (or cutoff mode) and the on-mode (or saturation mode in bipolar transistors, or ohmic mode for MOSFET's), and visits the active mode only briefly while switching between the on and off modes.

For historical reasons, the saturation mode of the MOSFET refers to its active mode, while the saturation mode of the bipolar transistor invariably refers to its on mode. This confusion of terminology does nothing to clarify discussion.

Bipolar junction transistor

(PD) Image: John R. Brews
Two bipolar transistor modes, showing extrapolation of asymptotes to the Early voltage.

Bipolar transistor	B-E Junction Bias	B-C Junction Bias	Mode
E injects, C collects	Forward	Reverse	Active (Forward-active)
E and C inject	Forward	Forward	Saturation
No injection	Reverse	Reverse	Cutoff
C injects, E collects	Reverse	Forward	Reverse-active

In the bipolar device, the emitter is designed for efficient injection, while the collector is designed to collect with low capacitance between collector and base. Thus, the bipolar device is inherently asymmetrical, and a distinction between forward and reverse modes of operation makes sense.

The figure shows two of the bipolar modes dividing a plot of transistor collector current versus collector-emitter voltage. The dividing curve is the current for V_CE=V_BE, or V_CB=0. In words, this curve is the boundary between the collector collecting and the collector injecting. The saturation mode at low values of V_CE is a region of strong current variation, while the active mode is a region of slow variation used in analog circuits. The inverse slope of the curves in the active region is the device output resistance, often approximated by the inverse slope of a fitted straight line that extrapolates to the device Early voltage, a performance parameter of the device. More detail is found in the article Bipolar transistor.

MOSFET

(PD) Image: John R. Brews
Two MOSFET modes in 3/4μm technology, showing extrapolation of asymptotes to the Early voltage.. The subthreshold mode, not shown, applies for very low V_GS.

MOS transistor	G-S Bias	G-D Bias	S-B Bias	D-B Bias	Mode
Channel at source end only	≥ VT(S)	≤ VT(D)	Zero or Reverse	More reverse than S-B	Active (Saturation)
Channel at both ends	≥ VT(S)	> VT(D)	Zero or Reverse	More reverse than S-B	Ohmic (Triode)
No channel	< VT(S)	< VT(D)	Zero or Reverse	Zero or reverse	Cutoff (Subthreshold)

In the MOSFET, the threshold at source (or drain) is altered by the source-to-body (or drain-to-body) voltage, requiring a larger gate-to-source (gate-to-drain) voltage for channel formation the larger the reverse bias. Hence, the two threshold voltages V_T(S) and V_T(D) are different if the two reverse biases differ.

The term "cutoff" seems to imply no current flow at all, so for the MOSFET the term "subthreshold" sometimes is preferred. In subthreshold operation the current in the MOSFET decreases to very low values exponentially with gate voltage, and has very weak dependence upon drain-to-source voltage.

The table separates modes based upon the presence or absence of an inversion layer, or channel, at one or both ends of the channel region, concepts that retain meaning even for modern MOSFETs with very small dimensions and/or four-terminal operation. On the other hand, the obsolete Shichman-Hodges model that short-circuits the source to the body to obtain a three-terminal representation, bases the distinction between modes upon voltages: V_DS < ( V_GS – V_T ) or V_DS > ( V_GS – V_T ), a more limited approach.

In the MOSFET, the source and drain are interchangeable, so reverse operation simply exchanges the source for the drain. An exception is the power MOSFET, which like the bipolar transistor, has source and drain separately optimized for their particular function.

The figure shows two of the MOSFET modes dividing a plot of transistor drain current versus drain-source voltage. The body is short-circuited to the source. The boundary curve is the line V_GD = V_T (where V _T is the threshold voltage for channel formation). In words, this curve is the current at a drain voltage high enough to extinguish the channel near the drain. The ohmic or triode mode at low values of V_DS is a region of strong current variation, while the active or saturation mode is a region of slow variation used in analog circuits. The inverse slope of the curves in the active region is the device output resistance, often approximated by the inverse slope of a fitted straight line that extrapolates to the device Early voltage, a performance parameter of the device. In MOSFETs, the Early voltage V_A usually is replaced by V_A=1/λ, where λ is called the channel-length modulation parameter. More detail is found in the article MOSFET.

"On" and "off " modes

(PD) Image: John R. Brews
A digital inverter circuit using a bipolar transistor.

(PD) Image: John R. Brews
Transfer characteristic of bipolar inverter showing modes.

The use of on- and off-modes is illustrated with the bipolar inverter circuit shown at the right. The circuit switches between "on" and "off" states (digital "one" and "zero") as the input V_IN switches from "zero" to "one". That is, the output is the inverse of the input. The way things work is described next.

The input is shown as a switch that can toggle between ground (a "zero" input) and some nonzero voltage (a "one" input). The "one" input position is shown in the figure. It applies voltage V_B to the base of the bipolar transistor, making the base-emitter voltage of this transistor V_BE=V_B. The value of V_B is large enough to cause a large collector current to flow through the resistor, so large that the collector voltage V_C=V_OUT is so low that the transistor is driven into saturation mode. That is, the collector is biased to inject carriers. The output voltage is V_CE(sat), the collector emitter voltage when the transistor is in saturation. This low output voltage is the "zero" level for the inverter output, and the saturation mode of the transistor corresponds to the "on" mode.

If now the switch is flipped to the ground position, the input is V_IN=0 V. The transistor V_BE is 0 V, and no collector current would flow. Consequently the voltage drop across the resistor is zero, and V_OUT=V_CC, the supply voltage and the voltage corresponding to digital "one" for the inverter. The transistor is now in the "off" mode which corresponds to the cutoff mode.

In practice, the input is not a switch, but a voltage signal, say v_IN. As v_IN is increased continuously from zero volts, the output voltage v_OUT follows a transfer curve, as shown in the figure. The voltages corresponding to a digital "zero" or digital "one" are not precisely 0 V or V_CC. The range of input voltages corresponding to a zero lie between 0 V and V_IL, and corresponds to a digital "one" output voltageV_OH. Likewise, a range of input voltages correspond to digital "one" voltages lies between V_IH and V_CC and results in a digital "zero" corresponding to V_OL. The "on" mode always corresponds to saturation, but strictly speaking the "off" mode does not cutoff unless the circuit is somewhat modified from that shown, because the bipolar V_BE for the circuit presented is nonzero and positive for positive v_IN; however, the current is so low the inverter still is described as cut off.

A parallel discussion applies when the transistor is a MOSFET instead of a bipolar transistor. The body is short-circuited to the source and v_IN = v_GS. The MOSFET switches from the subthreshold or cutoff mode at low v_IN, transiting the active mode, and ending up in the ohmic or triode mode at large v_IN.

Amplifier operation

A simple discussion of amplification using the active mode is based upon using the inverter as an amplifier.

To use the inverter as an analog amplifier, a DC bias is arranged that places the transistor in the active region of the transfer curve. The voltage v_IN then becomes:

$v_{IN}=V_{Q}+v_{S}\ ,$

with v_Q the quiescent or steady value of input voltage and v_S the superposed signal. As can be seen from the steep transfer curve in the active region, the output of the inverter then consists of a very much amplified signal superposed upon the quiescent output voltage. It also may be seen that for large amplitude signals v_S the output will hit the limits of the active region, crossing V_IL or V_IH and causing a flattening of the output signal form called clipping. It also may be seen that a faithful or undistorted output signal depends upon linearity of the transfer curve in the active region. The challenges for the analog designer are then (i) to arrange a good Q-point for the circuit, (ii) to arrange for a transfer curve with good linearity, and (iii) to arrange for a width of the active region portion of the transfer curve that will avoid clipping at the required signal amplitude.