Instruction set architecture: Difference between revisions
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Because the instruction set architecture of a [[CPU|processor]] is fundamental to its interface and usage, it is often used as a classification of the "type" of [[CPU|processor]], or CPU. For example, a | Because the instruction set architecture of a [[CPU|processor]] is fundamental to its interface and usage, it is often used as a classification of the "type" of [[CPU|processor]], or CPU. For example, a [[PowerPC]] processor uses some variant of the PowerPC ISA. ISA's for a family of processors may need to be qualified by a version number or name variant, such as [[SPARC]] version 9.0. | ||
Some processors, like the Intel [[Itanium]], can actually interpret instructions for more than one ISA; however, this is often accomplished by software rather than by designing the hardware to directly support both interfaces. (See [[emulator]].) | Some processors, like the [[Intel]] [[Itanium]], can actually interpret instructions for more than one ISA; however, this is often accomplished by software rather than by designing the hardware to directly support both interfaces. (See [[emulator]].) | ||
[[Category:Computers Workgroup]] | [[Category:Computers Workgroup]] | ||
[[Category:CZ Live]] | [[Category:CZ Live]] |
Revision as of 08:57, 26 May 2007
The instruction set architecture (ISA) is the formal specification of how a particular kind of computer may be programmed. An ISA completely defines the behavior expected of the machine, and its definition can be used to emulate a machine in software. The ISA describes everything that can be known about the machine language (the native commands used by a particular processor design).
An ISA usually includes the following items:
- a precise description of all the hardware data types (also called native data types)
- a list of machine instructions, also called opcodes (operation codes)
- descriptions of any registers
- allowed memory addressing modes
- memory management modes
- interrupts
- exception handling
- all about external I/O
Because the instruction set architecture of a processor is fundamental to its interface and usage, it is often used as a classification of the "type" of processor, or CPU. For example, a PowerPC processor uses some variant of the PowerPC ISA. ISA's for a family of processors may need to be qualified by a version number or name variant, such as SPARC version 9.0.
Some processors, like the Intel Itanium, can actually interpret instructions for more than one ISA; however, this is often accomplished by software rather than by designing the hardware to directly support both interfaces. (See emulator.)